Mastering RISC-V Processor for Embedded Systems Programming

Revealing RISC-V Processor Architecture, C/Assembly Programming for RISC-V CPU, RISC-V Main Features, Debugging RISC-V

What you'll learn
- Get to know RISCV Processor Architecture
- Understand RISCV instruction Set and programming model
- Learning how to write your first RISCV program
- Hands on RISCV Hardware blocks like PMP for memory protection, Toolchain in use, Interrupts
- Get a template RISCV makefile project

Requirements
- Basic knowledge on embedded systems developments as well as basic knowledge of existing processors families like X86 and ARM

Description
Does RISCV keyword tell you something or you have seen it online for sometime now? Do you want to learn RISCV Processor architecture and how does it differentiate from other Processors architectures like ARM? Do you want to write your first RISCV embedded project? Well this course is the answer for all those questions and even more!

RISCV is more than a simple keyword or basic concept that you learn one time and forget about it, RISCV Processor architecture is defining a new set of Processors to replace and compete at low cost the existing ones like ARM/X86 Processors, it is here to stay not to be forgotten!

What are you going to get from this course?

This course will help you to:

UnderstandRISCV Processor Architectureand how does it differentiate from other Processors Architectures.

You will see some benchmarking numbers with other Processors families like ARM.

Learn RISCV supportedmodes : Machine/Supervisor/User modesand how to switch between them.

Learn Interrupt handling on RISCV Processors.

Learn Different types of Exceptions and how RISCV differentiate between ExternalInterruptsand Internal Exceptions.

Learn Fault handling and how to analyze different Faults exceptions in RISCV.

Get to knowRISCV Instruction Set Architecture (ISA).

UnderstandPMP (Physical Memory Protection)hardware block.

Learn how to create memory protected areas in terms of access permissions using PMP Hardware Block.

Learn the difference between TOR and NAPORT address matching encodingmodes supported by PMP block, as well as how to encode and program properly PMP registers with the boundaries of the memory region you want to protect.

Learn how to writeC/Assembly code for your RISCV Processor.

Lear how RISCV processor is booting and executing your code base.

As part of the project you will get:

A template makefile based RISCV embedded project that you can compile and load into your RISCV device.

The project will compile and run onHiFive1 Board from SiFivecompany that has the G002 CPU (RISCV RV32 Processor type).

Set of tools needed to compile/load/debug your RISCV project and examples.

Set of practical examples, each one will cover some concepts/terminologies covered across  this course.

To know how to Load and debug your RISCV embedded project in SiFive HiFive1 Board.

To know different RISCV processor General Purpose Registers as well as CSR Specific Functionalities Registers.

This Course is not only about RISCV Processor, is as well about how to write and develop an embedded project on RISCV based platform!

Who this course is for:
- Embedded systems Students who wants to learn RISCV Processor Architecture
- Embedded systems developers who wants to get hands on RISCV Architecture as quick as possible
- Anyone who is curious about the RISCV architecture and want o learn about it
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